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Casiotone 403 Service Manual wanted!


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Hello and welcome Paulo!

 

I've had a look both in my collection of manuals, and also searched online, but unfortunately, I've not been able to locate a service manual for the CT403. I have the User Manual, but that only shows how to operate the Casio and doesn't have any schematics nor service information.

 

I've also looked for an MT60 manual as that model is supposedly the mini keys version of  the 403, but no luck finding one for that (rare) model either.

 

I do actually have a CT403 myself, and it's one of my favourites of the vintage Casios. It's simple but has a lovely warm sound in both its Tones and its accompaniment.

 

Can I ask why you need a service manual for your CT403? Is there a fault that you need help with?

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I got a photocopy of the Casiotone 403 service manual, but it is low quality and I don't have an intact scanner.

 

The 403 has the same mainvoice CPU like MT-60, but the more complex accompaniment hardware of Casiotone 401.

pinout D8049C-084

The "NEC D8049C 084" (40 pin DIL) was the accompaniment CPU of the first polyphonic Casio keyboards with rhythm. It supports a keyboard matrix for chord section and control panel, and has separate outputs for 7 analogue percussion triggers, bass envelope trigger (for external analogue decay circuit) and 5 data pins those can be demultiplexed in an I/O port IC "NEC D8243C" to output a monophonic squarewave bass tone and control the chord tone generator "Texas Instruments TMS3615NS". Unlike later accompaniment CPUs it does not control a passive main voice sound IC, but reads 4 of the main CPU keyboard matrix outputs to sense chord section keys. To prevent these keys from sounding also the main voice, there need to be external AND gates in the lines to the main CPUs keyboard matrix inputs to disable them during chord play. The principle how this accompaniment CPU taps into a given keyboard matrix by listening to its output lines and intercepting inputs is exactly the same like what midi retrofit kits for non-midi keyboards do.

 

Technically the "D8049C xxx" is a generic microcontroller of the well documented Intel MCS-48 family, so everything it does is entirely controlled by software of its internal 2KB ROM (I dumped it). So it makes no sense to write down a combined pinout for all software variants of D8049C because they differ too much. This pinout describes software number "084", based on the Casiotone 403 service manual and Intel MCS-48 datasheets.
 

pin name purpose
1 TO clock out 1MHz
2 XTAL clock in 3MHz
3 XTAL2 (not used)
4 /RESET reset
5 +VDD supply voltage +5V
6 /INT tempo clock in
7 EA (wired to ground)
8 /RD (not used)
9 /PSEN (not used)
10 /WR (not used)
11 ALE (not used)
12 DB0 key matrix in
13 DB1 key matrix in
14 DB2 key matrix in
15 DB3 key matrix in
16 DB4 key matrix in
17 DB5 key matrix in
18 DB6 key matrix in
19 DB7 key matrix in
20 GND ground 0V
21 P20 chord data out (D8243C pin 11)
22 P21 chord data out (D8243C pin 10)
23 P22 chord data out (D8243C pin 9)
24 P23 chord data out (D8243C pin 8  )
25 PROG chord data out (D8243C pin 7)
26 +VDD supply voltage +5V
27 P10 bass envelope trigger out
28 P11 hihat trigger out
29 P12 cymbal trigger out
30 P13 low conga trigger out
31 P14 high conga trigger out
32 P15 claves trigger out
33 P16 snare trigger out
34 P17 base drum trigger out
35 P24 key matrix in SW1
36 P25 key matrix in SW2
37 P26 key matrix in SW3
38 P27 key matrix in SW4
39 T1 key matrix sync in (main CPU pin 33 KC1)
40 VDD supply voltage +5V

 

The tempo clock input to pin 6 is externally produced by a PUT (Programmable Unijunction Transistor) oscillator, which frequency depends on the tempo potentiometer. Rhythm can start only at the falling edge of it, therefore oscillation is forced into the next lo phase by a pulse from D8243C pin 15 to start rhythm immediately by a start button or chord key press (synchro start). The clock frequency for TMS3615 is divided from pin 1 output through a complicated gate and flipflop circuit (TC4001, 2x TC4013, TC4510BP).

 

The I/O expander NEC D8243C converts the chord data into this:
 

pin name purpose
1 P50 chord E bit out
2 P40 chord C bit out
3 P41 chord C# bit out
4 P42 chord D bit out
5 P43 chord D# bit out
6 GND ground 0V
7 PROG data in (D8049C pin 25)
8 P23 data in (D8049C pin 24)
9 P22 data in (D8049C pin 23)
10 P21 data in (D8049C pin 22)
11 P20 data in (D8049C pin 21)
12 GND ground 0V
13 P70 green led drive out
14 P71 red led drive out
15 P72 accompaniment /start out
16 P73 bass tone out
17 P63 chord B bit out
18 P62 chord A# bit out
19 P61 chord A bit out
20 P60 chord G# bit out
21 P53 chord G bit out
22 P52 chord F# bit out
23 P51 chord F bit out
24 VDD supply voltage +5V

 

Pin 16 outputs the bass tone (monophonic squarewave) that is externally mixed with an analogue envelope controlled by D8049C pin 27; the tone is held so long it stays hi and then decays with capacitor envelope. The TMS3615NS produces 12 tones (full polyphonic notes of 1 octave with sustain) corresponding to the levels on the 12 chord bit outputs.

pinout TMS3615

The OMTS "Texas Instruments TMS3615NS" (28 pin SDIL, official name "Octave Multiple Tone Synthesizer") is used as a chord generator in the first polyphonic Casio keyboards with accompaniment. The IC derives from its clock rate the 12 tones of an octave (and a 13th tone) and outputs each of them so long the corresponding note input pin is hi(?). When the note stops, it falls silent with a decay envelope (sustain) that can be adjusted through an analogue control voltage input. This ancient PMOS IC was meant as an octave generator in full polyphonic 1970th home organs with very little digital control; a sign of its age is the unusually high +15V supply voltage (minimum +12V), which prevented easy battery operation and so made Casio soon abandon it. It can output 2 adjacent footages and sustain of the output is inplemented by external 1uF capacitor at each input, i.e. they are indeed VCA control voltages rather than digital. Pin 3 changes the pullup impedance of the key inputs and thus sustain length. The reset input is only used to synchronize the internal oscillators to control the phase in relation to other tone generators in the system. The clock out at half frequency was intended to daisychain these ICs in keyboards with multiple octaves. Interesting is that the TMS3615NS outputs 2 footages (e.g. for drawbar organs), thus an additional 1 octave lower version of the accompaniment (not used by Casio) exists on pin 16'OUT as an easteregg.

The inner working of this IC is thoroughly described in patent US4358982 (priority date 1979 | thanks Traktor for info). The signal processing behind the frequency dividers is fully analogue, including a large bank of VCA multiplying the key voltage (and volume envelope) with each drawbar partial tone. For these, the patent detailedly explains voltage stabilization and a special automatic DC offset voltage compensation circuit based on clocked (class D PWM?) chopper amplifiers to prevent key click and distortion.

 

This pinout is based on the Casiotone 403 service manual and TMS3615NS datasheet; in 403 schematics the IC is named "TMS 3615-25NS, RI-103" and also a 403 hardware photo shows "-25NS", so it may be a variant (clock speed like with RAM?). The variant RI107 outputs squarewave with 50% duty cycle, while RI103 has 25% at 8'OUT.

 

warning: A bizarre bug in the TMS3615NS datasheet of novermber 1981 garbled its pinout page, so all its pin numbers up to 15 are 1 too high and the rest 1 too low (verified by Casiotone 401 PCB photo). Apparently they wrote it down wrongly from a chip package drawing (absent in datasheet) because GND is indeed pin 13, and 14 and 15 unused, so I shifted them to to fill in the unused pins here. Likely TI initially planned to produce this chip in a shorter package, but 24 pin SDIP was not available.

On Vintage Chip I saw indeed a 24 pin DIL version for sale. A hand drawn pinout on Flickr by synx508 indicates that in Roland HP-60 the SDIL version of TMS3615NS has the same pinout like mine, suggesting that the other pinout was possibly used by an 28 pin DIL version.
 

pin
datasheet
pin
name purpose
1 2 NC (not used)
2 3 16'OUT? audio current '16 out (not used)
3 4 SUS BIAS sustain lenght control voltage in
4 5 VSS +VCC supply voltage +15V
5 6 K8 note F# control voltage in
6 7 K9 note G control voltage in
7 8 K10 note G# control voltage in
8 9 K11 note A control voltage in
9 10 K12 note A# control voltage in
10 11 K13 note B control voltage in
11 12 RESET OUT (not used)
12 13 CLOCK IN clock input (118.5 kHz)
13 14 VDD GND ground 0V
14 1 NC? (not used)
15 28 NC? (not used)
16 15 CLOCK OUT? clock/2 out (not used)
17 16 RESET IN reset
18 17 K1 note B-1 control voltage in (not used)
19 18 K2 note C control voltage in
20 19 K3 note C# control voltage in
21 20 K4 note D control voltage in
22 21 K5 note D# control voltage in
23 22 K6 note E control voltage in
24 23 K7 note F control voltage in
25 24 STB IN internal stabilizer control in
26 25 STB OUT internal stabilizer control out
27 26 8'OUT audio current '8 out
28 27 NC  (not used)

 

In Casiotone 403 schematics the pin 3 SUS BIAS is between 2 resistors forming a voltage divider 33k to +VCC and 22k to GND. Pin 26 STB OUT goes to the "+" input of an op-amp and 100k pulldown to -15V. Pin 25 STB IN goes to a 3.3uF electrolytic cap against +15V and through a 220 Ohm resistor to the output of  that op-amp. (Its "-" input is on GND.) According to datasheet this does automatic gain control to compensate temperature drift of the analogue circuit. If absent, STB IN should be wired to +VCC and STB OUT open. The datasheet suggests that against ESD damage(?) the pins SUS BIAS and STB IN should be connected through each a 0.5 megohm resistor to +VCC on the same PCB.

 

 

The Casiotone 403 main voice CPU D990G is a late member of the D77xG family.

pinout D77xG family

The "NEC D77xG" (64 pin zigzag DIL) was Casio's first polyphonic keyboard CPU that was used until 1981(?). It contains a keyboard matrix decoder with 4 quick access memory settings for favourite preset sounds, those are normally selected through keyboard keys + select button, but this selection method can be also simulated by preset sound buttons connected through logic ICs (like in Casiotone 401; pulling pin 34 hi seems to mute the demo note). The sound generator is 8 note polyphonic with digital envelope and stair shaped waveforms those sound much like multipulse squarewave. The 14bit digital audio output is fed into an external resistor ladder DAC. Each sound is made from 2 layered subvoices with independent envelope, what Casio called "Consonant-Vowel-Synthesis". It can additionally select timbres through an external analogue filter circuit controlled through 8 digital switch outputs. 2 of these CPUs with different software number can be wired parallel (one polls the keyboard matrix while both read it) to produce more complex layered preset sounds (4 subvoices using 2 filters). The tone scale can be switched from normal chromatic to a slightly spread variant which produces a chorus effect when 2 layered ICs set it differently. Clock can be input at pin 37 and output from pin 35 (half speed) daisychained to another CPU, or pin 35 is used as input. Bizarre is that this special CPU contains an LCD display port that is not used in any Casio keyboard (nor would it make sense in LCD pocket calculators due to size and power consumption). The CPUs in my 201 run a little hot - possibly because the digital supply voltage has 5.2V instead of the expected 5V and the analogue supply voltage is even 6V. In Casiotone 202 both have only 5V.

 

The naming convention of this earliest Casio keyboard CPU family is horrible; instead of software numbers the main number increases without any logical structure. It may be that advancing the 2nd or 1st digit reflects envelope algorithm changes or size of internal memory, but it also may be simply derived from the release date. According to Robin Whittle, all these ICs seem to differ only in their preset sound set and subtle changes like whether they can do sound selection without playing a demo note. He later called the hardware family 'Series I', but I prefer 'D77xG' despite it contradicts the naming in later keyboards.
 

CPU number hardware class notes & features
D771G Casiotone 201 layered with D772G
D772G '' (cpu 2)  
D773G Casiotone 301, 401, M-10  
D775G MT-30, MT-40  
D776G Casiotone 403 (old) later version has D990G
D788G Casiotone 202 layered with D789G
D789G '' (cpu 2)  
D990G MT-60, Casiotone 403 (new) bugfixed D776G? 

 

Like with most special Casio ICs there are no datasheets online, but with modern NEC ICs the prefix D77 is  used e.g. for 16 bit fixed point DSPs, D78 for generic microcontrollers (like D7811G) and D990 can be digital codecs, so it even may be that these CPUs are (e.g. by Allen's patent lawsuit) internally completely different and only share their pinout. But the very similar sound and behaviour of affected keyboards make this unlikely. Modern NEC IC types have a huge variety of variants and their numbers are longer, so it may be that in 1980 the naming convention did not exist yet and diversified during the following few years which resulted in changing prefix numbers within one family.

 

It is interesting that all other NEC D77x ICs are single-chip videogames containing a CPU with internal ROM and RAM. So D770C was a Pong clone (tennis, soccer, table tennis, solo + 2x shooting). D774C (42 pin DIL), D777C ### and D778C were cartridges for Epoch - Cassette Vision; despite very limited rom space, this busless microcontroller supports 48-bit instructions, which made it faster than 8-bit CPUs with external rom. D779 was the graphics+audio chip of Hanimex HMG7900 (which cartridges contain another microcontroller). It is unknown if there are any technical similarities to Casiotone, or if NEC IC numbers were simply given by date of development.

 

Strange is that while on internet photos I saw a Casiotone 403 with CPU D990G, its service manual refers to D776G and shows a somewhat complicated flipflop and gate logic network named "set control circuit" (involving ICs TC4013, TC4049, TC4073, TC4081, 74LS123 and 2 transistors), that during active "set" switch enables the keyboard matrix place "memory set" (SI2->KC3), and once a key is held, after a 2..10ms delay it plays the "A2" demo note (connecting KI4->KC4) and then disconnects SI2->KC3 (return to play mode) to prevent data mess when more than one key is depressed during memory set. In that circuit the "set" switch output is additionally connected through an inverter to CPU pin 34 I-2. The page comes with the note "This circuit prevents to preset another tone when hitting more than two keys while the MODE switch is at "SET"... This circuit is employed only in the initial lot of Casioton 403. Later produced 403 enclose the circuit within the LSI." So apparently early D77xG versions need external bugfix circuitry to function properly, which explains the lots of logic ICs inside Casiotone 201 despite the CPU concept is quite self-contained.

 

I had no schematics, so this D773G pinout was based on Robin Whittle's great bulletin "Modifying the Casiotone Instruments" which is not very detailed and lacks most pin names, so some pin order within equal named blocks are a guess and (particularly 40..43) may be wrong. Despite I later got service manual photocopys of MT-40/ MT-31 and Casiotone 403/ 101, even in their schematics unused pins are omitted, so some pin names were chosen by me. Apparently all "O-#" pins are outputs, "I-#" are inputs and "IO-#" can be both.
 

pin name purpose
1   lcd segment out (not used)
2   lcd segment out (not used)
3   lcd segment out (not used)
4   lcd segment out (not used)
5   lcd segment out (not used)
6   lcd segment out (not used)
7   lcd segment out (not used)
8   lcd segment out (not used)
9   lcd segment out (not used)
10   lcd segment out (not used)
11   lcd segment out (not used)
12   lcd segment out (not used)
13   lcd common (not used)
14   lcd common (not used)
15 SCH, I-1 /reset
16 SI-1 key matrix in
17 SI-2 key matrix in
18 KI-1 key matrix in
19 KI-2 key matrix in
20 KI-3 key matrix in
21 KI-4 key matrix in
22 KI-5 key matrix in
23 KI-6 key matrix in
24 KI-7 key matrix in
25 KC-8 key matrix out
26 KC-7 key matrix out
27 KC-6 key matrix out
28 KC-5 key matrix out
29 KC-4 key matrix out
30 KC-3 key matrix out
31 KC-2 key matrix out
32 GND ground 0V
 
pin name purpose
33 KC-1 key matrix out
34 I-2 sound data in? (wired to GND | CT-301, CT-403: hi during tone select)
35 CLK2 clock in/out (567.086 kHz in | clock/2 out)
36 Xtal-OUT  outputs clock frequency from pin 37 (sawtooth-like)
37 Xtal-IN clock in (1134.086 kHz)
38 M/S clock in select (lo=pin 37) 
39 IO-1 main voice /mute (lo during preset sound change, sound data out?)
40 IO-0 ? filter / volume / led out (CT-201 cpu1, CT-202 cpu1&2)
41 IO-2 ? filter / volume / led out (CT-201 cpu1, CT-202 cpu1&2)
42 IO-3 ? filter / volume / led out (CT-201 cpu1&2, CT-202 cpu2, CT-401)
43 IO-4 ? filter / volume / led out (CT-201 cpu2, CT-202 cpu2, CT-401)
44 IO-5 filter / volume / led out (MT-60, CT-201 cpu1&2, CT-202 cpu2, CT-401, CT-403)
45 IO-6 filter / volume / led out (CT-201 cpu1&2, CT-202 cpu2, CT-401, CT-403)
46 IO-7 filter / volume / led out (M-10, MT-40, MT-60, CT-201 cpu1&2, CT-401, CT-403)
47 IO-8 filter / volume / led out (MT-60, CT-201 cpu1&2, CT-202 cpu1&2, CT-401, CT-403)
48 O-28 dac bit out
49 O-27 dac bit out
50 O-26 dac bit out
51 O-25 dac bit out
52 O-24 dac bit out
53 O-23 dac bit out
54 O-22 dac bit out
55 O-21 dac bit out
56 O-20 dac bit out
57 O-19 dac bit out
58 O-18 dac bit out
59 O-17 dac bit out
60 O-16 dac bit out
61 O-15 dac bit out
62 +VG supply voltage 5..6V (sound generator?)
63 +VD supply voltage 5V (digital?)
64 VDS1 lcd supply voltage 3.1V (not used)

 

Robin Whittle describes pin 40..47 very ambiguously as "O-29 to O-31 and IO-4 to IO-8, used for filter, volume and LED control in different ways. Pin 46 controls filter cutoff frequency in the M-10". I measured that these pins output an individual static combinations of hi and lo (like a binary number) to identify each preset sound so long it stays selected. Pins 39..47 generally seem to need a pullup resistor to be useable. The Casiotone 202 PCB uses all these pins to control its filters; its D771G uses all but pin 43 and the D772G pin 42..47; the CPUs themselves output to all of them. Pin 39 goes low during any preset sound select ('memory set' or 'tone memory'), which is used to mute the main voice as a pop noise blocker; however the edges of the pulse have a strange jitter that may be serial data encoding the preset sound number. Pin 34 is (according to Whittle) only used in Casiotone 301 (also my similar 401; Casiotone 403 service manual says "Input from SET switch"); it may be a serial input to select preset sounds from its OBS buttons. I don't know if it can even receive synthesis data like the later D931C; particularly the fact that in US patent 4348932 the preset sound definition itself (and not only a pointer to a ROM address) is held in a register during execution suggests that there may be hidden functions for this. The mysterious LCD port seems to output the selected preset sound numbers. There are plenty of 3V squarewaves on these pins, of those some (the active segments?) halve their frequency. With set 'memory set' switch some segments seem to blink. Pin 13 and 14 have a stepped waveform from 0V to 1.5V to 3V vice versa, that apparently is the return pole for an LC display. If you want to install a homemade LED display here, I strongly recommend to use driver ICs, because these irreplaceable CPUs run already a little hot and may get damaged by additional current. (I haven't tried to connect a display.)

 

I found no official specification of the D77xG. The only text that comes close to it is what Robin Whittle wrote on his website about the inner working.

Edited by CYBERYOGI =CO=Windler
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  • 2 weeks later...
On 3/1/2023 at 1:12 PM, EPG said:

Hi Paulo,

I've got a copy of the 403 service manual with schematics.

 

 

 

If you have it in PDF format, please upload it to the files section. It will be very helpful for some people 🙂 

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